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Overclocking a Xeon on an LGA 775 board: FSB, straps and stable settings

Last updated: By Marek Halloran9 min readCPU ModsRetro & Legacy Hardware

Overclocking a Xeon on an LGA 775 board: FSB, straps and stable settings

A Harpertown Xeon on an LGA 775 adapter cannot raise its own multiplier. The E5450 tops out at 9x and the X5460 at 9.5x, so the only way up is the front-side bus (FSB): the clock shared by the CPU, the northbridge and, through a ratio, the memory. That is the whole character of this kind of overclock. You are not tuning a processor. You are tuning a bus, and everything hanging off it comes along for the ride.

The arithmetic, before any settings

Three relationships cover almost everything on this platform.

  • Core clock = FSB clock x multiplier.
  • Bus transfer rate = FSB clock x 4, because the data lines are quad-pumped. Intel's X48 datasheet spells it out: a 333 MHz bus clock moves data at 1333 MT/s, a 400 MHz clock at 1600 MT/s, for 10.6 and 12.8 GB/s of peak bandwidth.
  • Memory clock = FSB clock x the FSB:DRAM ratio, and DDR memory moves two transfers per clock.

Intel lists the E5450 at 3.00 GHz and the X5460 at 3.16 GHz on a 1333 MT/s bus. Divide by 333.33 MHz and you get 9 and 9.5, the same multipliers Wikipedia's Xeon list shows. (333.33 x 9.5 is 3,166 MHz; Intel rounds down.) From there the table writes itself:

FSB clock Bus rate E5450 at 9x X5460 at 9.5x DDR2 at 1:1 DDR3 at 1:2
333 MHz 1333 MT/s 3.00 GHz 3.17 GHz DDR2-667 DDR3-1333
350 MHz 1400 MT/s 3.15 GHz 3.33 GHz DDR2-700 DDR3-1400
366 MHz 1464 MT/s 3.29 GHz 3.48 GHz DDR2-732 DDR3-1464
380 MHz 1520 MT/s 3.42 GHz 3.61 GHz DDR2-760 DDR3-1520
400 MHz 1600 MT/s 3.60 GHz 3.80 GHz DDR2-800 DDR3-1600

The FSB overclock calculator does the same sums for any multiplier and ratio, so you can plan a target before you open the BIOS.

One number in that table deserves respect. A 400 MHz bus is 1600 MT/s, and Intel's 4 Series datasheet lists only 800, 1066 and 1333 MT/s for the P45, P43, G45 and G41. Intel rated 1600 MT/s on the X48. On everything else you are asking the northbridge to run a bus speed it was never specified for, which is why the northbridge can be the part that gives up before the CPU does.

A worked example: 3.0 GHz to 3.6 GHz on a 9x chip

Say you have an E5450 on a P45 board with two DDR2-800 sticks. At stock the BIOS runs the bus at 333 MHz and the memory at a 5:6 ratio, which puts the DRAM clock at 400 MHz, DDR2-800 exactly. You want 3.6 GHz.

Target core clock    3,600 MHz / 9 = 400 MHz FSB

Keep the 5:6 ratio   400 x 6/5 = 480 MHz DRAM clock = DDR2-960
                     (20 percent over the sticks' rating)

Switch to 1:1        400 x 1   = 400 MHz DRAM clock = DDR2-800
                     (back on the label)

So the plan is 400 MHz x 9 with the memory at 1:1. The CPU gains 20 percent, the memory stays at its rated speed, and the only new stress is the bus itself. If the board offers a 1:2 ratio and you have DDR3 sticks rated for 1600, the same logic gives DDR3-1600 at 400 MHz.

Ratio names differ between boards, and some BIOSes show the resulting memory speed instead of the ratio. ASUS's manual for its P45-based P5QD Turbo notes that the DRAM Frequency choices change with the FSB setting, so set the FSB first, then pick the memory speed that lands at or below your modules' rating.

Straps and the northbridge

Many P45 and P35 boards have a setting called FSB strap, or FSB Strap to North Bridge on ASUS boards. The P5QD Turbo manual lists Auto, 200, 266, 333 and 400 MHz, and says Auto picks the strap from your FSB and DRAM settings.

Intel does not document straps for end users; what follows is established community knowledge from the overclocking forums of the time. The strap selects a set of internal timings in the northbridge and decides which memory ratios the BIOS offers. Owners commonly report that a lower strap keeps the northbridge's internal latency tight but runs out of headroom sooner, while a higher strap relaxes it so the chip can hold a faster bus. If a target FSB will not POST on Auto, trying the strap one step up or down is a normal next move.

Voltages in plain terms

No specific "safe" voltage appears here, because Intel does not publish overclocking voltages and we will not invent one. What Intel does publish is each chip's VID range (VID is the voltage ID a chip requests from the board's regulator): ARK gives 0.850 V to 1.350 V for both the E5450 and the X5460, and defines the VID range as "the minimum and maximum voltage values at which the processor is designed to operate." Anything above the top of that range is outside Intel's design envelope, full stop.

The settings you will meet on a typical P45 board, using the ASUS names:

  • CPU Voltage (vcore) feeds the cores. More voltage helps a chip hold a higher clock and raises heat steeply. Under load the delivered voltage sags below the set value by design (vdroop). Load-Line Calibration reduces that sag; owners report it can also cause brief overshoots when the load drops, so check readings under load and at idle.
  • FSB Termination Voltage (VTT) powers the termination on the bus lines between the CPU and the northbridge. Intel's chipset datasheets describe a GTL+ bus with integrated termination resistors. A quad-core Harpertown is two dual-core dies in one package, both driving the same bus, which loads it harder than a dual core does. Owners commonly treat a small VTT increase as the first remedy when a high FSB will not hold.
  • NB Voltage feeds the northbridge core. A faster bus and faster memory both ask more of it, and its heatsink runs warm even at stock. Give it airflow before you give it voltage.
  • CPU GTL Reference sets the threshold at which the receivers decide whether a bus line is a 0 or a 1, as a fraction of VTT. Boards that expose it show it as a ratio or percentage, and some split it into separate values for each die. This is community territory with no Intel tuning guidance. Leave it on Auto until you have a bus instability nothing else fixes, then move it one notch at a time.
  • DRAM Voltage should match the label on your modules. Raising it to rescue an out-of-spec memory speed is a sign to use a different ratio instead.

A careful climb, step by step

  1. Record stock. Photograph each BIOS page, note the reported VID, and run a short load test to see stock temperatures. This is your baseline and your way back.
  2. Get the firmware right. The board needs a BIOS with microcode for your Xeon, or you will be chasing faults that have nothing to do with the clock. The LGA 771 Xeon microcode page covers that, and the compatibility page covers which chipsets are worth trying at all.
  3. Pin the side clocks. Set the PCIe frequency to 100 MHz instead of Auto (the P5QD Turbo manual shows it as a separate setting, 100 to 180), turn off CPU and PCIe spread spectrum, and set memory timings and voltage by hand to the values on the module label.
  4. Choose the ratio for the target. Use the math above so the memory stays at or below its rating at your final FSB, not just at the first step.
  5. Raise the FSB 10 to 20 MHz at a time. Boot, check that the BIOS reports the expected clock, then run a short stress test while watching temperatures.
  6. When a step fails, suspect the bus first. In community experience, a failed boot at a higher FSB on this platform more often points to VTT, northbridge voltage or the strap than to vcore. Change one of them by one step, or back off the FSB.
  7. Prove the final setting. Long tests, described next, and only then call it done.
  8. Write it down. Keep a card with the final FSB, ratio, strap and every voltage you changed.

Proving stability

Run Memtest86+ first, every time you change the memory ratio or timings. It boots from a USB stick on both legacy BIOS and UEFI machines, so it works on these boards, and it tests the RAM without an operating system that might be corrupted by errors along the way.

Then Prime95. Its torture test compares the machine's results with answers known to be correct, so any mismatch is a hardware problem, not a software one. The test menu offers Small FFTs, which stay inside the CPU caches and push heat and core stability hardest, and Large FFTs, which spill out to memory. On an FSB platform the memory controller lives in the northbridge, so the Large and Blend modes exercise the bus, the northbridge and the RAM together, which makes them the more telling test for this kind of overclock. The program's own documentation suggests running the torture test for 6 to 24 hours, and for a day if the machine is overclocked. A failure after several hours still counts.

Finish with what you actually use the machine for: a long game session, a large compile, a video encode.

Temperatures and cooling

Intel's thermal limit for these chips is Tcase, the maximum temperature allowed at the integrated heat spreader (IHS, the metal lid): 67°C for the E5450 and 63°C for the X5460, per ARK. Monitoring software reports core temperatures from on-die sensors instead, which are a different measurement and depend on the maximum junction temperature the software assumes for the chip. Treat those readings as a trend: compare stock and overclocked figures under the same test, and keep a clear margin.

Heat rises faster than clock speed. Dynamic power scales roughly with frequency times voltage squared, so a 20 percent clock gain with a small voltage bump adds more than 20 percent to the heat the cooler must move. The X5460 starts at a 120 W TDP (thermal design power, the heat its cooler must handle at stock) before any of that. The cooler TDP headroom check helps you see whether your cooler has room, and fresh paste is worth applying before the long tests.

Those suggestions come from specifications and published reviews, not from our own testing.

Knowing when to stop

Stop when the next FSB step needs a voltage you cannot justify, when temperatures under Prime95 close in on the Tcase figure, or when errors appear that only extra northbridge voltage hides. A 3.4 GHz E5450 that passes a day of Blend is worth more than a 3.6 GHz one that crashes on a Sunday afternoon. Write the last fully stable settings on that card, tape it inside the side panel, and load them again after every CMOS reset.

Sources and further reading

Planning a Xeon swap? run the LGA 771 compatibility checker.

Headshot of Marek Halloran
Marek Halloran

Marek writes the socket-mod and Xeon pages. He likes boards with too many jumpers, keeps a drawer of LGA 775 chips sorted by stepping, and reads Intel spec updates the way other people read box scores.