Intel Core 2 Extreme QX9650
Drops into a supported LGA 775 board as it is; check the board's CPU list. How to check.
Intel Core 2 Extreme QX9650: 4-core, 3.0 GHz, Yorkfield, LGA 775, 1333 MT/s FSB, 12 MB (2 x 6 MB) L2, 130 W TDP.
This is the earliest 45 nm Core 2 Extreme in the database, dated Q4 2007 by ARK. Yorkfield brings 12 MB of L2 as two 6 MB halves and adds SSE4.1, which some newer software expects. The TDP did not drop with the shrink: it stays at 130 W, the same rating as the Kentsfield Extremes, so plan cooling the same way. VID runs from 0.85 V to 1.3625 V, and Tcase is 64.5 °C. Two steppings are listed. C0 (SLAN3, CPUID 10676) appears in Intel's spec update; the C1 sSpec SLAWN does not, so its CPUID, 10677, is mapped from the stepping table rather than copied from an Intel document. As an upgrade it suits a board that already runs 45 nm quads and has the power stage for it.
| Family | Core 2 Extreme |
|---|---|
| Codename | Yorkfield |
| Socket | LGA 775 |
| Cores / threads | 4 / 4 |
| Base clock | 3 GHz |
| Front-side bus | 1333 MT/s (333 MHz base clock) |
| Multiplier | 9x |
| L2 cache | 12 MB (2 x 6 MB) |
| TDP | 130 W |
| Process | 45 nm |
| Launch | Q4 2007 |
| Dual-socket capable | No |
| VT-x | Yes |
| SSE4.1 | Yes |
| Enhanced SpeedStep | Yes |
| Max case temperature | 64.5 °C |
| Voltage range (VID) | 0.85 V to 1.3625 V |
Steppings and microcode IDs
| Stepping | CPUID | sSpec |
|---|---|---|
| C0 | 10676 | SLAN3 |
| C1 | 10677 | SLAWN |
A BIOS needs a microcode update matching the CPUID (and, for Xeons, the LGA 771 platform ID). See LGA 771 Xeon microcode and how to read your stepping.
Mod notes
Drop it into a board that already lists 45 nm Yorkfield quads: check the maker's CPU table for the QX9650 with its C0 or C1 stepping and note the BIOS version that adds it. A board from before 45 nm quads may never get support, and the 130 W rating calls for solid power delivery.