Intel Xeon 5110
Runs in an LGA 775 board only with the adapter sticker, the socket tabs removed and BIOS support for its core. How the mod works.
Intel Xeon 5110: 2-core, 1.6 GHz, Woodcrest, LGA 771, 1066 MT/s FSB, 4 MB (shared) L2, 65 W TDP.
Bottom rung of the Woodcrest 5100 line: two cores at 1.6 GHz on a 1066 MT/s bus with a multiplier of 6, 4 MB of shared L2 and a 65 W TDP from a 65 nm die. Woodcrest is the server twin of the Conroe Core 2 Duo, so after the mod this behaves like a modest Conroe, fine for a quiet XP box or a light file server. VT-x is there for virtual machines; SSE4.1 is not. On Enhanced SpeedStep the sources split: ARK says yes, but Intel's spec update lists no EIST for SL9RZ, SLABR or SLAGE, so the table says no and the chip lacks Intel's clock and voltage scaling. ARK's archived page also has no launch date, so the Q2 2006 comes from Wikipedia.
| Family | Xeon |
|---|---|
| Codename | Woodcrest |
| Socket | LGA 771 |
| Cores / threads | 2 / 2 |
| Base clock | 1.6 GHz |
| Front-side bus | 1066 MT/s (267 MHz base clock) |
| Multiplier | 6x |
| L2 cache | 4 MB (shared) |
| TDP | 65 W |
| Process | 65 nm |
| Launch | Q2 2006 |
| Dual-socket capable | Yes |
| VT-x | Yes |
| SSE4.1 | No |
| Enhanced SpeedStep | No |
| Max case temperature | 65 °C |
| Voltage range (VID) | B2: 1 V to 1.5 V; G0: 0.85 V to 1.5 V |
Steppings and microcode IDs
| Stepping | CPUID | sSpec |
|---|---|---|
| B2 | 6F6 | SL9RZ, SLABR |
| G0 | 6FB | SLAGE |
A BIOS needs a microcode update matching the CPUID (and, for Xeons, the LGA 771 platform ID). See LGA 771 Xeon microcode and how to read your stepping.
Mod notes
Press the adapter sticker onto the CPU, cut the two key tabs out of the LGA 775 socket, and add microcode for CPUID 6F6 (B2) and 6FB (G0) with the LGA 771 platform ID, on a board that already runs 65 nm Conroe Core 2 Duo chips. Cutting the tabs is permanent, and a careless blade can bend the socket pins next to them.
Check a specific board with the LGA 771 to 775 compatibility checker.